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Array Processor Having a Segmented Bus System
특허 실용신안 개요
| 기관명 | NDSL |
|---|---|
| 출원인 | PACT XPP TECHNOLOGIES AG |
| 출원번호 | US-0018376 |
| 출원일자 | 2016-02-08 |
| 공개번호 | 20160603 |
| 공개일자 | 0000-00-00 |
| 등록번호 | |
| 등록일자 | 0000-00-00 |
| 권리구분 | USAP |
| 초록 | An array processor on integrated circuit chip. The array processor has a plurality of memories and a segmented bus system, wherein each segment is selectively connectable to other segments and wherein each segment has a plurality of selectable data paths. A segment is connected to each array processor and each memory whereby a plurality of selectable data paths are provided between each processor and other processors, between each processor and each memory and between each memory and other memories. |
| 원문URL | http://click.ndsl.kr/servlet/OpenAPIDetailView?keyValue=03553784&target=USAP&cn=USA2016060154758 |
| 첨부파일 |
추가정보
| 과학기술표준분류 | |
|---|---|
| ICT 기술분류 | |
| IPC분류체계CODE | G06F-013/40(2006.01),G06F-015/82(2006.01) |
| 주제어 (키워드) |